久操AV-五月天丁香-中文字幕一区二区三区精华液-在线观看免费观看在线-红桃av在线-肉色超薄丝袜脚交一区二区-99国产精品久久久久久久久久久-黄三级-综合av网-少妇人妻一区二区三区-欧美日韩图片-深田咏美av在线-欧美猛交免费-女女综合网-国产又粗又猛又爽又-欧美三级成人-亚洲区免费视频-日本乳汁视频-日日草视频-成人欧美亚洲-天堂av2021-日本美女视频一区-全黄性高潮-性高潮久久久久久久久久-免费av资源在线观看

Contact us
Send E-MAIL
Home ? News ? News & Events ? sram chip

sram chip

2017-12-07 14:25:16

    Static random access memory (SRAM) is a form of memory in a computer system. SRAM provides low­latency, high speed data access. It is a volatile memory technology, meaning that its data is lost when power is turned off. Because of the relatively large SRAM cell size, it is not economically feasible to implement large capacity memories as SRAM.
 
Historically, SRAM provided memory to the computer system in discrete form. That role has since been supplanted by DRAM. However, SRAM continues to play a very important role integrated into silicon alongside CPUs, ASICs, and SoCs. Processor cache is almost exclusively implemented as SRAM. Firmware registers and FIFOs within the digital logic also utilize SRAM.
 
The core of a single­bit SRAM cell is just a latch made of two cross­coupled inverters. There are also two transistors, which act as pass gates to control access to the cell from the bitline. The feedback loop inherent in the latch means that periodic refresh cycles (such as in DRAM) are unnecessary. To read from the SRAM cell, the pass gates are activated and the latch is allowed to drive the bitlines high or low. Writing to the SRAM cell is more involved: the internal feedback of the latch must be overpowered by the input circuit, which is providing the new data.
 
 
Open